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Sadayappan, P.
An Approach to Locality-Conscious Load Balancing and Transparent Memory Hierarchy Management with a
Global-Address-Space Parallel Programming Model
|
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An Extensible Global Address Space Framework with Decoupled Task and Data Abstractions
|
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Memory Minimization for Tensor Contractions using Integer Linear Programming
|
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Parallel FPGA-based All-Pairs Shortest-Paths in a Directed Graph
|
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Scheduling of Tasks with Batch-shared I/O on Heterogeneous Systems
|
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Safaei, F.
Software-Based Fault-Tolerant Routing Algorithm in Multi-Demensional Networks
|
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Sahoo, Ramendra K.
Cooperative Checkpointing Theory
|
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Evaluating Cooperative Checkpointing for Supercomputer Systems
|
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Lossless Compression for Large Scale Cluster Logs
|
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Saini, Subhash
Interconnect Performance Evaluation of SGI Altix 3700 BX2, Cray X1, Cray Opteron Cluster, and Dell PowerEdge
|
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Performance Evaluation of Supercomputers using HPCC and IMB Benchmarks
|
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Sait, Sadiq M.
Evaluating Parallel Simulated Evolution Strategies for VLSI Cell Placement
|
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Sakellariou, Rizos
An Evaluation of Heuristics for SLA Based Parallel Job Scheduling
|
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Scheduling Multiple DAGs onto Heterogeneous Systems
|
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Salfner, Felix
Predicting Failures of Computer Systems: A Case Study for a Telecommunication System
|
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Saltz, Joel
Design and Analysis of a Multi-dimensional Data Sampling Service for Large Scale Data Analysis Applications
|
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Scheduling of Tasks with Batch-shared I/O on Heterogeneous Systems
|
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Saltz , J.
I/O Conscious Algorithm Design and Systems Support for Data Analysis on Emerging Architectures
|
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Sampson, John
Detecting Phases in Parallel Applications on Shared Memory Architectures
|
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Sanchez, Cesar
On Efficient Distributed Deadlock Avoidance for Real-Time and Embedded Systems
|
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Sanchez, Eduardo
On-chip and On-line Self-Reconfigurable Adaptable Platform: the Non-Uniform Cellular Automata Case
|
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Sancho-royo, Alejandro
A Proposal of Metaheuristics Based in the Cooperation between Operators in Combinatorial Optimization Problems
|
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Santambrogio, Marco Domenico
VHDL to FPGA automatic IPCore generation: A case study on Xilinx design flow
|
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Santonja, Vicente
Dynamic Power Saving in Fat-Tree Interconnection Networks Using On/Off Links
|
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Santoro, Nicola
Network Decontamination with Local Immunization
|
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Santos, Ricardo
Exploiting Dynamic Reconfiguration Techniques: The 2D-VLIW Approach
|
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Sarbazi-azad, Hamid
A Comparative Performance Analysis of n-Cubes and Star Graphs
|
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Analytical Performance Modelling of Adaptive Wormhole Routing in the Star Interconnection Network
|
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Analytical Performance Modelling of Partially Adaptive Routing in Hypercubes
|
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Sarin, Vivek
Parallel Algorithms for Inductance Extraction of VLSI Circuits
|
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Sassatelli, Gilles
Securing Embedded Programmable Gate Arrays in Secure Circuits
|
|
Sato, Mitsuhisa
MegaProto/E: Power-Aware High-Performance Cluster with Commodity Technology
|
|
Profile-based Optimization of Power Performance by using Dynamic Voltage Scaling on a PC cluster
|
|
Scarano, Vittorio
Optimizing the Finger Table in Chord-like DHTs
|
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Schüler, Erik
Increasing Analog Programmability in SoCs
|
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Schaeli, Basile
A Simulator for Parallel Applications with Dynamically Varying Compute Node Allocation
|
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Schamberger, Stefan
Accelerating Shape Optimizing Load Balancing for Parallel FEM Simulations by Algebraic Multigrid
|
|
Scheideler, Christian
Distributed Coloring in Ő (Ö
log n) Bit Rounds
|
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Scheidler, Alexander
Self-Organized Task Allocation for Computing Systems with Reconfigurable Components
|
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Scheirer, Walter
Network Intrusion Detection with Semantics-Aware Capability
|
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Schieschke, Michael
Predicting Failures of Computer Systems: A Case Study for a Telecommunication System
|
|
Schindelhauer, Christian
Distributed Coloring in Ő (Ö
log n) Bit Rounds
|
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Oblivious Parallel Probabilistic Channel Utilization without Control Channels
|
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Schiper, André
Structural and Algorithmic Issues of Dynamic Protocol Update
|
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Schmid, Stefan
Algorithmic Models for Sensor Networks
|
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Schmidt, Bertil
Bio-Sequence Database Scanning on a GPU
|
|
Schnable, Patrick S.
Assembling Genomes on Large-Scale Parallel Computers
|
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Scholten, Hans
On Consistency Maintenance In Service Discovery
|
|
Schordan, Markus
Annotating User-Defined Abstractions for Optimization
|
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Schroder, Andre
Bio-Sequence Database Scanning on a GPU
|
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Schuch, Silke
Parallelisation of a Simulation Tool for Casting and Solidification Processes on Windows Platforms
|
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Schuck, Christian
Elementary Block Based 2-Dimensional Dynamic and Partial Reconfiguration for Virtex-II FPGAs
|
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Schulz, Martin
Dynamic Program Phase Detection in Distributed Shared-Memory Multiprocessors
|
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Schuster, Jeffrey W.
Speech Silicon AM: An FPGA-Based Acoustic Modeling Pipeline for Hidden Markov Model based Speech Recognition
|
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Schwiebert, Loren
Preserving Source Location Privacy in Monitoring-Based Wireless Sensor Networks
|
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Sechi, Mirela
Towards Building a Highly-Available Cluster Based Model for High Performance Computing
|
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Sedighi, Mehdi
Reducing Reconfiguration Time of Reconfigurable Computing Systems in Integrated Temporal Partitioning and Physical Design
Framework
|
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Sedukhin, Stanislav G.
The General Matrix Multiply-Add Operation on 2D Torus
|
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Sehr, Matthias
Privacy-aware Presence Management in Instant Messaging Systems
|
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Seidel, Steven R.
A Performance Model for Fine-Grain Accesses in UPC
|
|
Semé, David
Power-Dependable Transactions in Mobile Networks
|
|
Sen, Koushik
Decentralized Runtime Analysis of Multithreaded Applications
|
|
Sendag, Resit
Quantifying and Reducing the Effects of Wrong-Path Memory References in Cache-Coherent Multiprocessor Systems
|
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Sens, Pierre
Using Incentives to Increase Availability in a DHT
|
|
Septién, Julio
2D Defragmentation Heuristics for Hardware Multitasking on Reconfigurable Devices
|
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Seredynski, Franciszek
A Nonself Space Approach to Network Anomaly Detection
|
|
Sereno, Matteo
Efficient Broadcasting of Safety Messages in Multihop Vehicular Networks
|
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Model-based Evaluation of Search Strategies in peer-to-peer Networks
|
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Sezer, Sakir
Design and Analysis of Matching Circuit Architectures for a Closest Match Lookup
|
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Investigation into Programmability for Layer 2 Protocol Frame Delineation Architectures
|
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Shaikh, Hidayatullah
Resource Management with Stateful Support for Analytic Applications
|
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Shan, Jiulong
Parallel implementation and performance characterization of MUSCLE
|
|
Shao, Shuyi
A Compiler-based Communication Analysis Approach for Multiprocessor Systems
|
|
Sharma, Amit
Topology-aware Task Mapping for Reducing Communication Contention on Large Parallel Machines
|
|
Sharma, Sushant
Making a Case for a Green500 List
|
|
Shavit, Nir
Composite Abortable Locks
|
|
Sheahan, Robert
Dynamic Resource Allocation of Computer Clusters with Probabilistic Workloads
|
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Shen, Haiying
Hash-based Proximity Clustering for Load Balancing in Heterogeneous DHT Networks
|
|
Shen, Kai
Program Phase Detection and Exploitation
|
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Shi, Weisong
Preserving Source Location Privacy in Monitoring-Based Wireless Sensor Networks
|
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Shi, Xudong
Coterminous Locality and Coterminous Group Data Prefetching on Chip-Multiprocessors
|
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Shipman, Galen M.
Infiniband Scalability in Open MPI
|
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Shnayderman, Ilya
Wire-Speed Total Order
|
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Shu, Guoqiang
A Note on Broadcast Encryption Key Management with Applications to Large Scale Emergency Alert Systems
|
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Siegel, Howard Jay
A Brokering Framework for Large-Scale Heterogeneous Systems
|
|
Plan Switching: An Approach to Plan Execution in Changing Environments
|
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Sifakis, Joseph
WPDRTS Keynote: Component-based Construction of Embedded Systems
|
|
Sikdar, Biplab
Modeling Malware Propagation in Gnutella Type Peer-to-Peer Networks
|
|
Silc, Jurij
Ant Stigmergy on the Grid: Optimizing the Cooling Process in Continuous Steel Casting
|
|
Silva, Miguel L.
Exploiting dynamic reconfiguration of platform FPGAs: Implementation issues
|
|
Silvestri, Francesco
Cache-Oblivious Simulation of Parallel Programs
|
|
Singh, Manbir
Accelerating DTI Tractography using FPGAs
|
|
Singhal, Gaurav
Battery Aware Dynamic Scheduling for Periodic Task Graphs
|
|
Singhal, Love
Physically-aware Exploitation of Component Reuse in a Partially Reconfigurable Architecture
|
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Sinha, Rishi Rakesh
Bitmap Indexes for Large Scientific Data Sets: A Case Study
|
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Siozios, Konstantinos
Platform-based FPGA Architecture: Designing High-Performance and Low-Power Routing Structure for Realizing DSP Applications
|
|
Sipma, Henny B.
On Efficient Distributed Deadlock Avoidance for Real-Time and Embedded Systems
|
|
Siqueira, Isabela G.
An Integrated Approach for Density Control and Routing in Wireless Sensor Networks
|
|
Sivasubramaniam, Anand
Enhancing L2 Organization for CMPs with a Center Cell
|
|
Skambraks, Martin
A Real-Time PES Supporting Runtime State Restoration after Transient Hardware-Faults
|
|
Skeie, Tor
Segment-Based Routing: An Efficient Fault-Tolerant Routing Algorithm for Meshes and Tori
|
|
Sleiman, Marwan
Dynamic Resource Allocation of Computer Clusters with Probabilistic Workloads
|
|
Slimane, Mohamed
Sharing Resources with Artificial Ants
|
|
Smit, Gerard J. M.
An Optimal Architecture for a DDC
|
|
A Pattern Selection Algorithm for Multi-Pattern Scheduling
|
|
Smith, Marc L.
Phylospaces: Reconstructing Evolutionary Trees in Tuple Space
|
|
Smolka, Scott A.
Compiler-Assisted Software Verification Using Plug-Ins
|
|
Soares, André Borin
Reconfigurable Communications for Image Processing Applications
|
|
Sobe, Peter
Construction of Efficient OR-based Deletion-tolerant Coding Schemes
|
|
Sobral, Joao Luis Ferreira
Incrementally Developing Parallel Applications with AspectJ
|
|
Soffa , Mary Lou
Techniques and Tools for Dynamic Optimization
|
|
Sokolsky, Oleg
Schedulability Analysis of AADL Models
|
|
Solar, Manuel Rubio Del
Placement and Routing of Boolean Functions in constrained FPGAs using a Distributed Genetic Algorithm and Local Search.
|
|
Solihin, Yan
Helper Thread Prefetching for Loosely-Coupled Multiprocessor Systems
|
|
Son, Sang H.
An Overview of Data Aggregation Architecture for Real-Time Tracking with Sensor Networks
|
|
Son, Seung Woo
Integrated Link/CPU Voltage Scaling for Reducing Energy Consumption of Parallel Sparse Matrix Applications
|
|
Sosonkina, Masha
IMAGE: An approach to building standards-based enterprise Grids
|
|
Sotiriades, Euripides
FPGA based Architecture for DNA Sequence Comparison and Database Search
|
|
Some Initial Results on Hardware BLAST Acceleration with a Reconfigurable Architecture
|
|
Sottile, Matthew J.
Performance Analysis of Parallel Programs via Message-passing Graph Traversal
|
|
Soudris, Dimitrios
Platform-based FPGA Architecture: Designing High-Performance and Low-Power Routing Structure for Realizing DSP Applications
|
|
Souham, Meshoul
Multiple Sequence Alignment by Quantum Genetic Algorithm
|
|
Soula, Julien
Real-Time Systems for Multi-Processor Architectures
|
|
Sousa, Leonel
Reconfigurable Memory Based AES Co-Processor
|
|
Sousa, Marcelo S.
A Multiple Task Allocation Framework for Biological Sequence Comparison in a Grid Environment
|
|
Souza, Fábio N.
Using Stochastic Petri Nets for Performance Modelling of Application Servers
|
|
Souza, Leandro
DVoDP2P: Distributed P2P Assisted Multicast VoD Architecture
|
|
Spelce, Thomas E.
Performance Evaluation of Supercomputers using HPCC and IMB Benchmarks
|
|
Spies, François
Simulating and Optimizing A Peer-to-Peer Computing Framework
|
|
Spognardi, Angelo
A Formal Framework for the Performance Analysis of P2P Networks Protocols
|
|
Spooner, Daniel P.
Performance Evaluation of Scheduling Applications with DAG Topologies on Multiclusters with Independent Local Schedulers
|
|
Srimani, Pradip
Self-Stabilizing Distributed Algorithms for Graph Alliances
|
|
Stamatakis, Alexandros
Phylogenetic Models of Rate Heterogeneity: A High Performance Computing Perspective
|
|
Stander, Justin
Design Space Exploration for Low-Power Reconfigurable Fabrics
|
|
Stankovic, John A.
An Overview of Data Aggregation Architecture for Real-Time Tracking with Sensor Networks
|
|
Steffan, J. Gregory
Improving Cache Locality for Thread-Level Speculation
|
|
Steffenel, Luiz Angelo Barchet-
Scheduling Heuristics for Efficient Broadcast Operations on Grid Environments
|
|
Sterling, Thomas
Hierarchical Multithreading: Programming Model and System Software
|
|
Stevens, Rick
Hierarchical Multithreading: Programming Model and System Software
|
|
Stewart, Greg
A Database-centric Approach to System Management in the Blue Gene/L Supercomputer
|
|
Stiehr, Gary
Improving Cluster Utilization through Intelligent Processor Sharing
|
|
Stierand, Ingo
An Optimal Approach to the Task Allocation Problem on Hierarchical Architectures
|
|
Stodghill, Paul
Recent Advances in Checkpoint/Recovery Systems
|
|
Stojmenovic, Milos
Broadcasting and Routing in Faulty Mesh Networks
|
|
Subramonian, Venkita
On Efficient Distributed Deadlock Avoidance for Real-Time and Embedded Systems
|
|
Sucha, Premysl
Scheduling of Tasks with Precedence Delays and Relative Deadlines - Framework for Time-optimal Dynamic Reconfiguration of FPGAs
|
|
Sukhatme, Gaurav
Engineering Reliability into Hybrid Systems via Rich Design Models: Recent Results and Current Directions
|
|
Sun, Ninghui
An Experimental Study of Optimizing Bioinformatics Applications
|
|
Improving Locality of Nonserial Polyadic Dynamic Programming
|
|
Sun, Xian-he
PMEO Keynote: Remove the Memory Wall: From performance modeling to architecture optimization
|
|
The GHS Grid Scheduling System: Implementation and Performance Comparison
|
|
Sundararaj, Ananth I.
Free Network Measurement For Adaptive Virtualized Distributed Computing
|
|
Sunderam, Vaidy
Integrating Heterogeneous Information Services Using JNDI
|
|
Sundramoorthy, Vasughi
On Consistency Maintenance In Service Discovery
|
|
Supinski, Bronis R. De
Dynamic Program Phase Detection in Distributed Shared-Memory Multiprocessors
|
|
Suppi, Remo
DVoDP2P: Distributed P2P Assisted Multicast VoD Architecture
|
|
Sur, Sayantan
Shared Receive Queue based Scalable MPI Design for InfiniBand Clusters
|
|
Susin, Altamiro Amadeu
Reconfigurable Communications for Image Processing Applications
|
|
Sussman, Alan
DiST: Fully Decentralized Indexing for Querying Distributed Multidimensional Datasets
|
|
Suzuki, Masayasu
A Cost-Effective Context Memory Structure for Dynamically Reconfigurable Processors
|
|
Svensson, Bertil
A Configurable Framework for Stream Programming Exploration in Baseband Applications
|
|
Swany, Martin
An Automated Approach to Improve Communication-Computation Overlap in Clusters
|
|
Sweeney, Peter F.
Aligning Traces for Performance Evaluation
|
|
Szychowiak, Michal
Checkpointing and Rollback-Recovery Protocol for Mobile Systems with MW Session Guarantee
|
|
Ta, Duong Nguyen Binh
Efficient Client-to-Server Assignments for Distributed Virtual Environments
|
|
Tabero, Jesús
2D Defragmentation Heuristics for Hardware Multitasking on Reconfigurable Devices
|
|
Taher, Mohamed
Exploiting Processing Locality through Paging Configurations in Multitasked Reconfigurable Systems
|
|
Taheri, Javid
A Combined Genetic-Neural Algorithm for Mobility Management
|
|
Takahashi, Daisuke
MegaProto/E: Power-Aware High-Performance Cluster with Commodity Technology
|
|
Profile-based Optimization of Power Performance by using Dynamic Voltage Scaling on a PC cluster
|
|
Talbi, El-ghazali
A Parallel Exact Hybrid Approach for Solving Multi-Objective Problems on the Computational Grid
|
|
Tan, Chik How
Energy-Efficient ID-based Group Key Agreement Protocols for Wireless Networks
|
|
Tan, Guangming
An Experimental Study of Optimizing Bioinformatics Applications
|
|
Improving Locality of Nonserial Polyadic Dynamic Programming
|
|
Tarawneh, M.
Parallel Implementation of a Quartet-Based Algorithm for Phylogenetic Analysis
|
|
Tatas, Konstantinos
Platform-based FPGA Architecture: Designing High-Performance and Low-Power Routing Structure for Realizing DSP Applications
|
|
Tatikonda, S.
I/O Conscious Algorithm Design and Systems Support for Data Analysis on Emerging Architectures
|
|
Taufer, Michela
A Systematic Multi-step Methodology for Performance Analysis of Communication Traces of Distributed Applications based on
Hierarchical Clustering
|
|
Tchernykh, Andrei
Parallel Multiple Sequence Alignment with Local Phylogeny Search by Simulated Annealing
|
|
Teller, Patricia
Unification of Verification and Validation Methods for Software Systems: Progress Report and Initial Case Study Formulation
|
|
Teller, Patricia J.
A Systematic Multi-step Methodology for Performance Analysis of Communication Traces of Distributed Applications based on
Hierarchical Clustering
|
|
Tenzer, Jennifer
A Design Environment for Mobile Applications
|
|
Teo, Joseph Chee Ming
Energy-Efficient ID-based Group Key Agreement Protocols for Wireless Networks
|
|
Teo, Yong Meng
An Adaptive Stabilization Framework for Distributed Hash Tables
|
|
Thakur, Rajeev
MPI-IO/L: Efficient Remote I/O for MPI-IO via Logistical Networking
|
|
Thanailakis, Antonios
Platform-based FPGA Architecture: Designing High-Performance and Low-Power Routing Structure for Realizing DSP Applications
|
|
Thazhuthaveetil, M. J.
Exploiting Programmable Network Interfaces for Parallel Query Execution in Workstation Clusters
|
|
Theodoridis, George
An Automated Development Framework for a RISC Processor with Reconfigurable Instruction Set Extensions
|
|
Thomas, Nigel
Modelling Job Allocation where Service Duration is Unknown
|
|
Performance Analysis of Stochastic Process Algebra Models using Stochastic Simulation
|
|
Thorvaldsen, Stian
Formal Modeling and Analysis of Wireless Sensor Network Algorithms in Real-Time Maude
|
|
Tian, Yuan
Real-Time Task Mapping and Scheduling for Collaborative In-Network Processing in DVS-Enabled Wireless Sensor Networks
|
|
Timmermann, Dirk
A Distributed Object System Approach for Dynamic Reconfiguration
|
|
Tirthapura, Srikanta
Concurrent Counting is Harder than Queuing
|
|
Tixeuil, Sébastien
Fault Injection in Distributed Java Applications
|
|
Tiyyagura, Sunil R.
Performance Evaluation of Supercomputers using HPCC and IMB Benchmarks
|
|
Toal, Ciaran
Investigation into Programmability for Layer 2 Protocol Frame Delineation Architectures
|
|
Tomas, Rosana
Parallel Calculation of Volcanoes for Cryptographic Uses
|
|
Tongsima, Sissades
MT-ClustalW: Multithreading Multiple Sequence Alignment
|
|
Torres, Lionel
Securing Embedded Programmable Gate Arrays in Secure Circuits
|
|
Toscher, Steffen
Implementation of a Reconfigurable Hard Real-Time Control System for Mechatronic and Automotive Applications
|
|
Touzene, Abderezak
Approximated Tensor Sum Preconditioner for Stochastic Automata Networks
|
|
Tovar, Eduardo
GTS Allocation Analysis in IEEE 802.15.4 for Real-Time Wireless Sensor Networks
|
|
Trachsel, Oliver
On the Effectiveness of Speculative and Selective Memory Fences
|
|
Traff, Jesper Larsson
Collective Operations in NEC's High-performance MPI Libraries
|
|
Tretola, Giancarlo
Workflow Fine-grained Concurrency with Automatic Continuation
|
|
Trikaliotis, Spiro
Evaluating a Clock Synchronization for Dependable Sensor Networks
|
|
Trystram, Denis
Parallel Multiple Sequence Alignment with Local Phylogeny Search by Simulated Annealing
|
|
Tsafrir, Dan
Instability in Parallel Job Scheduling Simulation: The Role of Workload Flurries
|
|
Tsai, Mike
Using SCTP to Hide Latency in MPI Programs
|
|
Tsouloupas, George
Towards a Universal Client for Grid Monitoring Systems: Design and Implementation of the Ovid Browser
|
|
Tsugawa, Maurício
A Virtual Network (ViNe) Architecture for Grid Computing
|
|
Tuan, Vu Manh
A Cost-Effective Context Memory Structure for Dynamically Reconfigurable Processors
|
|
Performance and Power Analysis of Time-multiplexed Execution
on Dynamically Reconfigurable Processor
|
|
Tull, Monte P.
Dynamic Configuration Steering for a Reconfigurable Superscalar Processor
|
|
Selection of Instruction Set Extensions for an FPGA Embedded Processor Core
|
|
Tullsen, Dean M.
Exploiting Unbalanced Thread Scheduling for Energy and Performance on a CMP of SMT Processors
|
|
Tyson, Eric J.
Auto-Pipe and the X Language: A Pipeline Design Tool and Description Language
|
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