CASES'08 Table of Contents

Erik Altman (IBM Research)
Sridevan Parameswaran (University of New South Wales)


Author Index

Session 1: Resiliency 
Session Chair: Hsien-Hsin Lee (Georgia Tech)

StageNetSlice: A Reconfigurable Microarchitecture Building Block for Resilient CMP Systems (Page 1)
Shantanu Gupta (University of Michigan)
Shuguang Feng (University of Michigan)
Amin Ansari (University of Michigan)
Jason Blome (University of Michigan)
Scott Mahlke (University of Michigan)

A Light-weight Cache-based Fault Detection and Checkpointing Scheme for MPSoCs Enabling Relaxed Execution Synchronization (Page 11)
Chengmo Yang (University of California at San Diego)
Alex Orailoglu (University of California at San Diego)


ZebraNet and Beyond: Applications and Systems Support for Mobile, Dynamic Networks (Page 21)
Margaret Martonosi (Princeton University)

Session 2: Compiler Hardware Interaction 
Session Chair: Al Davis (Utah)

Non-Intrusive Dynamic Application Profiler for Detailed Loop Execution Characterization (Page 23)
Ajay Nair (University of Arizona)
Roman Lysecky (University of Arizona)

Exploring and Predicting the Architecture/Optimising Compiler Co-Design Space (Page 31)
Christophe Dubach (University of Edinburgh)
Timothy M. Jones (University of Edinburgh)
Michael F. P. O'Boyle (University of Edinburgh)

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Session 3: Reconfigurable Computing 
Session Chair: Sameh Asaad (IBM)

Optimus: Efficient Realization of Streaming Applications on FPGAs (Page 41)
Amir Hormati (University of Michigan)
Manjunath Kudlur (University of Michigan)
Scott Mahlke (University of Michigan)
David Bacon (IBM T.J. Watson Research Center)
Rodric Rabbah (IBM T.J. Watson Research Center)

Compiling Custom Instructions onto Expression-Grained Reconfigurable Architectures (Page 51)
Paolo Bonzini (University of Lugano)
Giovanni Ansaloni (University of Lugano)
Laura Pozzi (University of Lugano)

VESPA: Portable, Scalable, and Flexible FPGA-Based Vector Processors (Page 61)
Peter Yiannacouras (University of Toronto)
J. Gregory Steffan (University of Toronto)
Jonathan Rose (University of Toronto)

Dynamic Coprocessor Management for FPGA-Enhanced Compute Platforms (Page 71)
Chen Huang (University of California at Riverside)
Frank Vahid (University of California at Riverside)


Power on Demand for Mobile Computing Devices (Page 79)
William Athas (Apple, Inc.)

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Session 4: Multiprocessors 
Session Chair: Nate Clark (Georgia Institute of Technology)

Efficiency and Scalability of Barrier Synchronization on NoC Based Many-core Architectures (Page 81)
Oreste Villa (Pacific Northwest National Laboratory)
Gianluca Palermo (Politecnico di Milano)
Cristina Silvano (Politecnico di Milano)

Decoupled Root Scanning in Multi-Processor Systems (Page 91)
Wolfgang Puffitsch (Vienna University of Technology)

SoC-C: Efficient Programming Abstractions for Heterogeneous Multicore Systems on Chip (Page 99)
Alastair D. Reid (ARM Ltd.)
Krisztian Flautner (ARM Ltd.)
Edmund Grimley-Evans (ARM Ltd.)
Yuan Lin (University of Michigan)

Session 5: Caching and Its Impact 
Session Chair: Ann Gordon-Ross (Florida)

Reducing Pressure in Bounded DBT Code Caches (Page 109)
José A. Baiocchi (University of Pittsburgh)
Bruce R. Childers (University of Pittsburgh)
Jack W. Davidson (University of Virginia)
Jason D. Hiser (University of Virginia)

Efficient Code Caching to Improve Performance and Energy Consumption for Java Applications (Page 119)
Yu Sun (Southern Illinois University, Carbondale)
Wei Zhang (Southern Illinois University, Carbondale)

Cache-aware Cross-profiling for Java Processors (Page 127)
Walter Binder (University of Lugano)
Alex Villazón (University of Lugano)
Martin Schoeberl (Vienna University of Technology)
Philippe Moret (University of Lugano)

Predictable Programming on a Precision Timed Architecture (Page 137)
Ben Lickly (University of California at Berkeley)
Isaac Liu (University of California at Berkeley)
Sungjun Kim (Columbia University)
Hiren D. Patel (University of California at Berkeley)
Stephen A. Edwards (Columbia University)
Edward A. Lee (University of California at Berkeley)

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Session 6: Compilers 
Session Chair: Fabrice Rastello (ENS Lyon)

Advanced Conservative and Optimistic Register Coalescing (Page 147)
Florent Bouchez (ENS-Lyon)
Alain Darte (CNRS)
Fabrice Rastello (Inria)

Control Flow Optimization in Loops using Interval Analysis (Page 157)
Mohammad Ali Ghodrat (University of California at Irvine)
Tony Givargis (University of California at Irvine)
Alex Nicolau (University of California at Irvine)

Efficient Vectorization of SIMD Programs with Non-aligned and Irregular Data Access Hardware (Page 167)
Hoseok Chang (Seoul National University)
Wonyong Sung (Seoul National University)

Comprehensive Isomorphic Subtree Enumeration (Page 177)
Partha Biswas (The MathWorks, Inc.)
Girish Venkataramani (The MathWorks, Inc.)

Session 7: Power, Reconfigurability, and Simulation 
Session Chair: Leyla Nazhandali (Virginia Polytechnic Institute and State University)

Highly Energy and Performance Efficient Embedded Computing through Approximately Correct Arithmetic: A Mathematical Foundation and Preliminary Experimental Validation (Page 187)
Lakshmi N. B. Chakrapani (Rice University)
Kirthi Krishna Muntimadugu (Rice University)
Avinash Lingamneni (Rice University)
Jason George (Georgia Institute of Technology)
Krishna V. Palem (Rice University)

Multiple Sleep Mode Leakage Control for Cache Peripheral Circuits in Embedded Processors (Page 197)
Houman Homayoun (University of California at Irvine)
Mohammad Makhzan (University of California at Irvine)
Alex Veidenbaum (University of California at Irvine)

Design Space Exploration for Field Programmable Compressor Trees (Page 207)
Seyed Hosein Attarzadeh Niaki (Royal Institute of Technology)
Alessandro Cevrero (Ecole Polytechnique Federale de Lausanne)
Philip Brisk (Ecole Polytechnique Federale de Lausanne)
Chrysostomos Nicopoulos (Ecole Polytechnique Federale de Lausanne)
Frank K. Gurkaynak (Swiss Federal Institute of Technology, Zurich)
Yusuf Leblebici (Ecole Polytechnique Federale de Lausanne)
Paolo Ienne (Ecole Polytechnique Federale de Lausanne)

Multi-granularity Sampling for Simulating Concurrent Heterogeneous Applications (Page 217)
Melhem Tawk (University of Valenciennes and Hipeac Network of Excellence)
Khaled Z. Ibrahim (IRISA/INRIA)
Smail Niar (INRIA Lille-Nord-Europe)

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Session 8: Energy, Power, and Security 
Session Chair: Aviral Shrivastava (Arizona State University)

Active Control and Digital Rights Management of Integrated Circuit IP Cores (Page 227)
Yousra Alkabani (Rice University)
Farinaz Koushanfar (Rice University)

A Low-Power Parallel Design of Discrete Wavelet Transform using Subthreshold Voltage Technology (Page 235)
Michael B. Henry (Virginia Polytechnic Institute and State University)
Syed I. Haider (Virginia Polytechnic Institute and State University)
Leyla Nazhandali (Virginia Polytechnic Institute and State University)

Power Management of MEMS-Based Storage Devices for Mobile Systems (Page 245)
Mohammed G. Khatib (University of Twente)
Pieter H. Hartel (University of Twente)

Execution Context Optimization for Disk Energy (Page 255)
Jerry Hom (Rutgers University)
Ulrich Kremer (Rutgers University)