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High-Performance, Power-Aware Computing - HPPAC
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Workshop Introduction - HPPAC
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A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Ehsan Atoofian and Amirali Baniasadi
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Link Shutdown Opportunities During Collective Communications in 3-D Torus Nets
Sarah Conner, Sayaka Akioka, Mary Jane Irwin and Padma Raghavan
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A High Performance Cluster System Design by Adaptive Power Control
Masaaki Kondo, Yoshimichi Ikeda and Hiroshi Nakamura
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Load Miss Prediction - Exploiting Power Performance Trade-offs
Konrad Malkowski, Greg Link, Padma Raghavan and Mary Jane Irwin
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Leakage Energy Reduction in Value Predictors through Static Decay
Juan Manuel Cebrián, Juan Luis Aragón and José Manuel García
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Determining the Minimum Energy Consumption using Dynamic Voltage and Frequency Scaling
Min Yeol Lim and Vincent W. Freeh
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Scaling and Packing on a Chip Multiprocessor
Vincent W. Freeh, Tyler K. Bletsch and Freeman L. Rawson
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An Implementation of Page Allocation Shaping for Energy Efficiency
Matthew E. Tolentino, Joseph Turner and Kirk W. Cameron
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Power, Performance, and Thermal Management for High-Performance Systems
Heather Hanson, Stephen W. Keckler, Karthick Rajamani, Soraya Ghiasi, Freeman Rawson and Juan Rubio
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Green Supercomputing in a Desktop Box
Wu-chun Feng, Avery Ching and Chung-hsing Hsu
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