| Course Title | Computer Design Laboratory |
| Instructor | Daniel D. Gajski 218, ICS Engineering Research Facility |
| Office Location | 218 ICS Engineering Research Facility |
| Office Hours | After class or by appointment |
| Lecture | M W F 9:00am-9:50am at SSPA 1170 |
| TA |
Srikanth Srinivasan (Email: srikanth@cecs.uci.edu) |
| Grader |
Rex Chen (Email: chinjuc@uci.edu) |
| Primary Textbook |
VHDL: Analysis and Modeling of Digital Systems Zainalabedin Navabi, McGraw-Hill, 1997 |
| Design Tool | Synopsys VHDL Compiler and Simulator |
| Useful References |
Principles of Digital Design
Structured Logic Design with VHDL |
| Prerequisites | ICS 151 or ICS 152 |