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The 13th Asia and South Pacific Design Automation Conference

Session 2B  Interconnect Modeling and Simulation Techniques
Time: 13:30 - 15:35 Tuesday, January 22, 2008
Location: Room 310BC
Chairs: Yungseon Eo (Hanyang Univ., Republic of Korea), Yokomizo Goichi (STARC, Japan)

2B-1 (Time: 13:30 - 13:55)
TitleEfficient Numerical Modeling of Random Rough Surface Effects for Interconnect Internal Impedance Extraction
Author*Quan Chen, Ngai Wong (Univ. of Hong Kong, Hong Kong)
Pagepp. 152 - 157
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2B-2 (Time: 13:55 - 14:20)
TitleEfficient Techniques for 3-D Impedance Extraction Using Mixed Boundary Element Method
Author*Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu (Tsinghua Univ., China), Changhao Yan (Fudan Univ., China)
Pagepp. 158 - 163
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2B-3 (Time: 14:20 - 14:45)
TitleGenerating Stable and Sparse Reluctance/Inductance Matrix under Insufficient Conditions
Author*Yuichi Tanji (Kagawa Univ., Japan), Takayuki Watanabe (Univ. of Shizuoka, Japan), Hideki Asai (Shizuoka Univ., Japan)
Pagepp. 164 - 169
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2B-4 (Time: 14:45 - 15:10)
TitleHierarchical Krylov Subspace Reduced Order Modeling of Large RLC Circuits
AuthorDuo Li, *Sheldon X.-D. Tan (Univ. of California, Riverside, United States)
Pagepp. 170 - 175
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2B-5 (Time: 15:10 - 15:35)
TitleStatistical Noise Margin Estimation for Sub-Threshold Combinational Circuits
Author*Yu Pu (Tech. Univ. Eindhoven, Netherlands), Jose Pineda de Gyvez (NXP Research Eindhoven, Netherlands), Henk Corporaal (Tech. Univ. Eindhoven, Netherlands), Yajun Ha (Nat'l Univ. of Singapore, Singapore)
Pagepp. 176 - 179
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