| Title | Global Optimization of Common Subexpressions for Multiplierless Synthesis of Multiple Constant Multiplications |
| Author | Yuen-Hong Alvin Ho, Chi-Un Lei, *Hing-Kit Kwan, Ngai Wong (Univ. of Hong Kong, Hong Kong) |
| Page | pp. 119 - 124 |
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| Title | Decomposition Based Approach for Synthesis of Multi-Level Threshold Logic Circuits |
| Author | Tejaswi Gowda, *Sarma Vrudhula (Arizona State Univ., United States) |
| Page | pp. 125 - 130 |
| Detailed information (abstract, keywords, etc) | |
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| Title | Timing-Power Optimization for Mixed-Radix Ling Adders by Integer Linear Programming |
| Author | *Yi Zhu, Jianhua Liu, Haikun Zhu, Chung-Kuan Cheng (Univ. of California, San Diego, United States) |
| Page | pp. 131 - 137 |
| Detailed information (abstract, keywords, etc) | |
| PDF file | |
| Title | Efficient Synthesis of Compressor Trees on FPGAs |
| Author | Hadi Parandeh-Afshar (Univ. of Tehran, Iran), *Philip Brisk, Paolo Ienne (EPFL, Switzerland) |
| Page | pp. 138 - 143 |
| Detailed information (abstract, keywords, etc) | |
| PDF file | |
| Title | Area Recovery under Depth Constraint by Cut Substitution for Technology Mapping for LUT-Based FPGAs |
| Author | *Taiga Takata, Yusuke Matsunaga (Kyushu Univ., Japan) |
| Page | pp. 144 - 147 |
| Detailed information (abstract, keywords, etc) | |
| PDF file | |
| Title | An Optimal Algorithm for Sizing Sequential Circuits for Industrial Library Based Designs |
| Author | Sanghamitra Roy, Yu Hen Hu (Univ. of Wisconsin, Madison, United States), *Charlie Chung-Ping Chen, Shih-Pin Hung, Tse-Yu Chiang, Jiuan-Guei Tseng (Nat'l Taiwan Univ., Taiwan) |
| Page | pp. 148 - 151 |
| Detailed information (abstract, keywords, etc) | |
| PDF file | |