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The 12th Asia and South Pacific Design Automation Conference

Session 4C Logic Synthesis
Time: 10:15 - 12:20 Thursday, January 25, 2007
Location: Room 414+415
Chairs: Deming Chen (Univ. of Illinois, Urbana-Champaign, United States), Yutaka Tamiya (Fujitsu Lab., Japan)

4C-1 (Time: 10:15 - 10:40)
TitleAutomating Logic Rectification by Approximate SPFDs
Author*Yu-Shen Yang (Univ. of Toronto, Canada), Subarna Sinha (Synopsys, United States), Andreas Veneris (Univ. of Toronto, Canada), Robert Brayton (Univ. of California, United States)
Pagepp. 402 - 407
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4C-2 (Time: 10:40 - 11:05)
TitleBddCut: Towards Scalable Symbolic Cut Enumeration
Author*Andrew Chaang Ling, Jianwen Zhu (Univ. of Toronto, Canada), Stephen Dean Brown (Altera Toronto Technology Centre, Canada)
Pagepp. 408 - 413
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4C-3 (Time: 11:05 - 11:30)
TitleNode Mergers in the Presence of Don't Cares
Author*Stephen Plaza, Kai-hui Chang, Igor Markov, Valeria Bertacco (Univ. of Michigan, United States)
Pagepp. 414 - 419
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4C-4 (Time: 11:30 - 11:55)
TitleSynthesis of Reversible Sequential Elements
AuthorMin-Lung Chuang, *Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Pagepp. 420 - 425
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4C-5 (Time: 11:55 - 12:20)
TitleRecognition of Fanout-free Functions
AuthorTsung-Lin Lee, *Chun-Yao Wang (National Tsing Hua Univ., Taiwan)
Pagepp. 426 - 431
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