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The 12th Asia and South Pacific Design Automation Conference

Session 4B System Level Modeling
Time: 10:15 - 12:20 Thursday, January 25, 2007
Location: Room 413
Chairs: Tei-Wei Kuo (National Taiwan Univ., Taiwan), Shinya Honda (Nagoya Univ., Japan)

4B-1 (Time: 10:15 - 10:40)
TitleAbstract, Multifaceted Modeling of Embedded Processors for System Level Design
Author*Gunar Schirner, Andreas Gerstlauer, Rainer Doemer (Univ. of California, Irvine, United States)
Pagepp. 384 - 389
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4B-2 (Time: 10:40 - 11:05)
TitleFlexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC
Author*Patrice Gerin, Hao Shen, Alexandre Chureau, Aimen Bouchhima, Ahmed Amine Jerraya (TIMA Laboratory, France)
Pagepp. 390 - 395
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4B-3 (Time: 11:05 - 11:30)
TitleA Retargetable Software Timing Analyzer Using Architecture Description Language
Author*Xianfeng Li (Peking Univ., China), Abhik Roychoudhury, Tulika Mitra (National Univeristy of Singapore, Singapore), Prabhat Mishra (Univ. of Florida, United States), Xu Cheng (Peking Univ., China)
Pagepp. 396 - 401
Detailed information (abstract, keywords, etc)
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