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The 12th Asia and South Pacific Design Automation Conference

Session 4A Model Order Reduction and Macromodeling
Time: 10:15 - 12:20 Thursday, January 25, 2007
Location: Room 411+412
Chairs: Sheldon Tan (Univ. of California, Riverside, United States), Yehia Massoud (Rice Univ., United States)

4A-1 (Time: 10:15 - 10:40)
TitlePassive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form
AuthorBoyuan Yan, *Sheldon X.-D. Tan, Pu Liu (Univ. of California, Riverside, United States), Bruce McGaughy (Cadence Design Systems Inc., United States)
Pagepp. 355 - 360
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4A-2 (Time: 10:40 - 11:05)
TitleAutomated Extraction of Accurate Delay/Timing Macromodels of Digital Gates and Latches using Trajectory Piecewise Methods
AuthorSandeep Dabas, Ning Dong, *Jaijeet Roychowdhury (Univ. of Minnesota, Twin Cities, United States)
Pagepp. 361 - 366
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4A-3 (Time: 11:05 - 11:30)
TitlePractical Implementation of Stochastic Parameterized Model Order Reduction via Hermite Polynomial Chaos
AuthorYi Zou, Yici Cai, Qiang Zhou, Xianlong Hong (Tsinghua Univ., China), Sheldon X.D-Tan (Univ. of California, Riverside, United States), *Le Kang (Tsinghua Univ., China)
Pagepp. 367 - 372
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4A-4 (Time: 11:30 - 11:55)
TitleReduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation
Author*Arthur Nieuwoudt, Mehboob Alam, Yehia Massoud (Rice Univ., United States)
Pagepp. 373 - 378
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4A-5 (Time: 11:55 - 12:20)
TitleFrequency Selective Model Order Reduction via Spectral Zero Projection
AuthorMehboob Alam, *Arthur Nieuwoudt, Yehia Massoud (Rice Univ., United States)
Pagepp. 379 - 383
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