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The 12th Asia and South Pacific Design Automation Conference

Session 3C Model Checking and Applications to Digital and Analog Circuits
Time: 16:00 - 18:05 Wednesday, January 24, 2007
Location: Room 414+415
Chairs: Igor Markov (Univ. of Michigan, United States), Shin'ichi Minato (Hokkaido Univ., Japan)

3C-1 (Time: 16:00 - 16:25)
TitleDeeper Bound in BMC by Combining Constant Propagation and Abstraction
AuthorRoy Armoni (-, Israel), Limor Fix (Intel, United States), Ranan Fraer (Intel, Israel), *Tamir Heyman (Carnegie Mellon Univ., United States), Moshe Vardi (Rich Univ., United States), Yakir Vizel, Yael Zbar (Intel, Israel)
Pagepp. 304 - 309
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3C-2 (Time: 16:25 - 16:50)
TitleEfficient BMC for Multi-Clock Systems with Clocked Specifications
Author*Malay K Ganai, Aarti Gupta (NEC, United States)
Pagepp. 310 - 315
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3C-3 (Time: 16:50 - 17:15)
TitleSymbolic Model Checking of Analog/Mixed-Signal Circuits
Author*David Walter, Scott Little, Nicholas Seegmiller, Chris Myers (Univ. of Utah, United States), Tomohiro Yoneda (National Institute of Informatics, Japan)
Pagepp. 316 - 323
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3C-4 (Time: 17:15 - 17:40)
TitleEfficient Automata-Based Assertion-Checker Synthesis of SEREs for Hardware Emulation
Author*Marc Boule, Zeljko Zilic (McGill Univ., Canada)
Pagepp. 324 - 329
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