ADDRESS ACCELERATION MECHANISMS FOR AN ADAPTIVE CELLULAR TELEPHONY (ACT) COPROCESSOR (FriAmOR3)

Author(s) : Ali Ibrahim (University of Utah, United States of America) Al Davis (University of Utah, United States of America)

Abstract : The computational complexity of cellular telephone standards has increased faster than Moore's law. New architectural approaches will be needed in order to meet the performance needs while staying within acceptable energy budgets. The ACT coprocessor improves on the energy-delay characteristics of embedded systems by 2 to 3 orders of magnitude, and is within 1 to 2 orders of magnitude of an ASIC approach while retaining much of the generality of a general purpose processor. This paper summarizes the ACT architecture, details have been published elsewhere, and then presents the details of new architectural enhancements that have proven particularly effective in improving performance. The enhancements are a mode addressed register file (MARF) and separate address generation units (AGU's) for each SRAM port and a hardware loop unit(HLU). For the 9 DSP and telephony codes used to evaluate this architecture, 61\% of the load on an Intel Xscale's execution pipeline can be removed by using the MARF, HLU, and AGU mechanisms.

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