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The 13th Asia and South Pacific Design Automation Conference

Session 7C  Power: Delivery and Reduction
Time: 10:15 - 12:20 Thursday, January 24, 2008
Location: Room 311A
Chairs: Ki-seok Chung (Hanyang Univ., Republic of Korea), Junhyung Um (Samsung Electronics, Republic of Korea)

7C-1 (Time: 10:15 - 10:40)
TitleA Unified Methodology for Power Supply Noise Reduction in Modern Microarchitecture Design
AuthorMichael Healy, Fayez Mohamood, Hsien-Hsin S. Lee, *Sung Kyu Lim (Georgia Inst. of Tech., United States)
Pagepp. 611 - 616
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7C-2 (Time: 10:40 - 11:05)
TitleHeuristic Power/Ground Network and Floorplan Co-Design Method
Author*Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong (Tsinghua Univ., China)
Pagepp. 617 - 622
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7C-3 (Time: 11:05 - 11:30)
TitleVertical Via Design Techniques for Multi-Layered P/G Networks
Author*Shuai Li, Jin Shi, Yici Cai, Xianlong Hong (Tsinghua Univ., China)
Pagepp. 623 - 628
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7C-4 (Time: 11:30 - 11:55)
TitleStatistical Mixed Vt Allocation of Body-Biased Circuits for Reduced Leakage Variation
AuthorJinseob Jeong, *Seungwhun Paik, Youngsoo Shin (KAIST, Republic of Korea)
Pagepp. 629 - 634
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7C-5 (Time: 11:55 - 12:20)
TitleExploring High-Speed Low-Power Hybrid Arithmetic Units at Scaled Supply and Adaptive Clock-Stretching
AuthorSwaroop Ghosh, *Kaushik Roy (Purdue Univ., United States)
Pagepp. 635 - 640
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