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The 13th Asia and South Pacific Design Automation Conference

Session 4C  New Techniques for Physical Design Optimization
Time: 10:15 - 12:20 Wednesday, January 23, 2008
Location: Room 311A
Chairs: Evangeline F.Y. Young (The Chinese Univ. of Hong Kong, Hong Kong), Sherief Reda (Brown Univ., United States)

4C-1 (Time: 10:15 - 10:40)
TitleDPlace2.0: A Stable and Efficient Analytical Placement Based on Diffusion
AuthorTao Luo, *David Z. Pan (Univ. of Texas, Austin, United States)
Pagepp. 346 - 351
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4C-2 (Time: 10:40 - 11:05)
TitleTotal Power Optimization Combining Placement, Sizing and Multi-Vt Through Slack Distribution Management
AuthorTao Luo (Univ. of Texas, Austin, United States), David Newmark (Advanced Micro Devices, United States), *David Z. Pan (Univ. of Texas, Austin, United States)
Pagepp. 352 - 357
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4C-3 (Time: 11:05 - 11:30)
TitleAn Innovative Steiner Tree Based Approach for Polygon Partitioning
AuthorYongqiang Lu, *Qing Su, Jamil Kawa (Synopsys, United States)
Pagepp. 358 - 363
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4C-4 (Time: 11:30 - 11:55)
TitleAn MILP-Based Wire Spreading Algorithm for PSM-Aware Layout Modification
Author*Ming-Chao Tsai, Yung-Chia Lin, Ting-Chi Wang (Nat'l Tsing Hua Univ., Taiwan)
Pagepp. 364 - 369
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4C-5 (Time: 11:55 - 12:08)
TitleLow Power Clock Buffer Planning Methodology in F-D Placement for Large Scale Circuit Design
Author*Yanfeng Wang, Qiang Zhou, Yici Cai (Tsinghua Univ., China), Jiang Hu (Texas A&M Univ., United States), Xianlong Hong, Jinian Bian (Tsinghua Univ., China)
Pagepp. 370 - 375
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4C-6 (Time: 12:08 - 12:21)
TitlePower Grid Analysis Benchmarks
Author*Sani R. Nassif (IBM, United States)
Pagepp. 376 - 381
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